【摘 要】
：
Memristor based computing-in-memory chips have shown the potentials to accelerate deep neural networks with high energy efficiency.Due to the inherent filament-based conductive mechanism of the memristor,the reading and writing noises are hard to eliminat
【机 构】
：
Institute of Microelectronics,Beijing National Research Center for Information Science and Technolog
论文部分内容阅读
Memristor based computing-in-memory chips have shown the potentials to accelerate deep neural networks with high energy efficiency.Due to the inherent filament-based conductive mechanism of the memristor,the reading and writing noises are hard to eliminate.Besides,the precision of the large-scale memristor array is still limited.However,when the noise of the memristor is large,the existing training methods to reduce the accuracy loss of memristor based computing-in-memory chips will face challenges.Hence,we proposed the array-level boosting method with spatial extended allocation to reduce the accuracy loss induced by the limited precision and large noises.To optimize the spatial allocation number of each layer in the neural network,the greedy spatial extended allocation algorithm is also proposed.The image processing and classification tasks are demonstrated based on fabricated 32× 128 memristor arrays to valid the performance of the proposed method.The chip-in-loop results show that the recovered accuracy of ResNet-34 on CIFAR-10 with array-level boosting method is 92.3％,which is closed to software-based accuracy of 93.2％.
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