介绍了一种简洁可靠的数字锁相频综快速跳频的原理、组成及实现,采用电阻开关网络对锁相环(PLL)进行预置,在保证相位噪声、杂散等指标不变的前提下提高了跳频速度,并通过了实际的测试。该方法实现了锁相电路跳频过程中的快速预置,加速了频综的跳频速度。 A concise and reliable principle, composition and implementation of fast frequency hopping of digital phase-locked frequency synthesizer are introduced. The phase-locked loop (PLL) is pre-set by the resistor switching network. The premise of ensuring the unchanged phase noise, spurious and other indicators Under the increased frequency hopping speed, and passed the actual test. The method realizes the fast preset in the phase-locked circuit frequency hopping process and accelerates the frequency hopping speed of the frequency synthesizer.