最近,日本公司发表了制成带有通孔的硅衬底基板的结果。在该结果中,使用硅作为系统级封装的中间层,这层硅的上表面,有多层铜/聚酰亚胺互连布线;硅层有通孔,可供下表面与外部电路板的面阵连接。上层中的铜线宽5微米,间距5微米; 多层布线之间通孔20微米,连接区30微米。硅层通孔的直径为10-300微米,硅层厚度170-300微米,最细通孔孔径为10微米,孔深要达到170微米。硅衬底基片上的通孔制作要使用感应耦合反应离子刻蚀(ICP-RIE)工艺在硅层上打孔,然后采用背面减薄,露出通孔。孔刻出后,对硅片进行热氧化,生长800纳 Recently, Japanese companies have published the results of making silicon substrate with vias. In this result, silicon is used as an intermediate layer of a system-in-package, and the upper surface of this layer of silicon is provided with a plurality of layers of copper / polyimide interconnection wiring. The silicon layer has through holes for the lower surface to contact with the external circuit board Area array connection. The copper wire in the upper layer is 5 microns wide and 5 microns apart. The vias between the multilayer wires are 20 microns and the connection area is 30 microns. The diameter of the silicon via is 10-300 micrometers, the thickness of the silicon layer is 170-300 micrometers, the smallest via diameter is 10 micrometers and the depth of the hole is 170 micrometers. Through-hole Fabrication on Silicon Substrate Substrate A hole was drilled in the silicon layer using an inductively coupled reactive ion etching (ICP-RIE) process and then backside thinned to expose the via. Hole engraved out, the thermal oxidation of silicon, growing 800 satisfied