论文部分内容阅读
为了满足嵌入式机器视觉后续图像处理的需要,结合高速DSP和FPGA的特点,设计了一套面向嵌入式机器视觉系统的图像数据采集系统。充分利用FPGA内部异步FIFO资源作为数据缓冲区,将异步FIFO数据以TMS320DM642的PDT方式写入数据SDRAM。当SDRAM接收一帧图像可以直接用DSP进行图像处理。DSP读写SDRAM速度高达150 MHz,PDT传输方式不占用DSP CPU时间,不影响图像处理速度。该系统具有电路结构简单、数据传输实时性好和易于升级等优点。
In order to meet the needs of the follow-up image processing of embedded machine vision, combined with the characteristics of high-speed DSP and FPGA, a set of image data acquisition system for embedded machine vision system is designed. Make full use of asynchronous FIFO resources within the FPGA as a data buffer and write the asynchronous FIFO data to the data SDRAM in the PDT mode of TMS320DM642. When SDRAM receives a frame of image can be directly used DSP image processing. DSP read and write SDRAM speeds up to 150 MHz, PDT transmission does not take up DSP CPU time, does not affect the image processing speed. The system has the advantages of simple circuit structure, real-time data transmission and easy to upgrade.