针对分组密码算法,研究了反复循环、循环展开和流水线三种实现结构,分析了三种结构下系统的资源占用、吞吐率、最高工作频率等参数,以求在各种不同应用环境,找出满足其需求的实现方案。以3DES为例分别实现了这三种结构,最后给出了基于Altera公司的CYCLONE系列FPGA的实现结果,对结果进行了比较和分析。 Aiming at the block cipher algorithm, this paper studies three implementation structures of repeated loop, loop unrolling and pipeline, and analyzes the resource occupancy, throughput and maximum operating frequency of the system under the three kinds of structures, so as to find out in different application environments Meet their needs to achieve the program. Taking 3DES as an example, we implement these three structures separately. Finally, we give the results of CYCLONE FPGA based on Altera and compare and analyze the results.