论文部分内容阅读
随着集成电路工艺复杂性和规模复杂度的提高 ,芯片测试变得越来越困难 ,而可测性设计可以用来简化测试 ,降低测试成本。但是可测性设计将加大设计的难度 ,必须通过可测性设计自动化来降低其难度 ,我们在九五国家攻关计划的支持下完成了一个集成电路可测性设计的辅助软件—— AISC2 0 0 0 TA,通过大量的实例分析证明该软件具有一定的实用性。
Chip testing becomes more and more difficult as the complexity and complexity of the integrated circuit increase. Testability design can be used to simplify testing and reduce test costs. However, the design of testability will increase the difficulty of design and the difficulty must be reduced through the design of automation of testability. With the support of the Ninth Five-nation Research Program, we have completed the design of an assistive software for testability of integrated circuits - AISC20 0 TA, through a large number of examples to prove that the software has some practicality.