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分辨率增强技术(Resolution Enhancement Technology, RET)在集成电路制造中的应用使得光刻用掩模图形日趋复杂, 而掩模制造成本和制备时间也随之增加. 由于光刻工艺包含了一系列复杂的物理和化学过程, 分辨率增强技术本身很难保证其输出结果的正确性, 因此在制造之前, 利用计算机对已经过处理的版图作可制造性验证变得十分必要. 文中介绍了光刻建模、成像模拟和问题区域查找的算法, 回顾和比较了当今流行的post-RET验证方法, 并阐述了基于密集采样成像算法(Dense Silicon Imaging, DSI)的可制造性验证的必要性. 并在密集采样成像算法的各个关键步骤提出了新的加速算法. 在新算法的帮助之下, 以往由于计算量太大而被认为不实用的基于密集采样成像的可制造性检查得到了实现.文章的最后部分给出了密集采样成像算法在实际中应用的例子和实验结果.
The application of Resolution Enhancement Technology (RET) in the manufacture of integrated circuits has led to the increasingly complicated mask patterns for lithography and the increased manufacturing costs and fabrication time of masks.Because the lithography process involves a series of complex Of the physical and chemical processes, the resolution enhancement technology itself is difficult to guarantee the correctness of the output results, so it is necessary to verify the manufacturability of the processed layout by using a computer before manufacturing.This paper introduces the lithography This paper reviews and compares the popular post-RET verification methods and expounds the necessity of manufacturability verification based on Dense Silicon Imaging (DSI) A new acceleration algorithm is proposed for each of the key steps of the dense sampling algorithm, with the aid of a new algorithm, a manufacturability check based on dense sampling imaging, which was previously considered impractical due to large computations, was implemented. The last part gives examples and experimental results of dense sampling algorithm in practice.