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基于现场可编程门阵列(FPGA)的高速数据处理能力,介绍了一种采用双比例积分微分(PID)算法的数字化伺服控制系统,在一定程度上改善了数字化锁相中锁定精度与控制范围之间的矛盾,大大提高了单次锁定持续时间。程序采用正弦扫描和积分扫描两种方法分别实现了相位失锁自动搜索功能,并且在实验上得到了验证。前者失锁后的搜索时间更短,而后者稳定性更高,单次锁定持续时间更长。相对于传统的模拟电路伺服系统,该数字伺服控制系统在锁定精度方面略有差距,这主要受到FPGA数字电路的电子学噪声及处理速度的限制,但在锁定持续时间上却有明显优势。
Based on the high-speed data processing capability of field programmable gate array (FPGA), a digital servo control system based on double proportional-integral-derivative (PID) algorithm is introduced to improve the locking accuracy and control range of digital phase lock to a certain extent Between the contradictions, greatly increased the duration of a single lock. The program uses sinusoidal scanning and integral scanning two methods to achieve the phase loss lock automatic search function, and has been verified experimentally. The former lost search after a shorter lock, while the latter is more stable, a single lock longer duration. Compared with the traditional analog servo system, the digital servo control system has a slight difference in the locking accuracy, which is mainly limited by the electronic noise and processing speed of the FPGA digital circuit. However, it has obvious advantages in locking duration.