文章主要介绍了ＭＯＳ器件中边界陷阱的特点、性能、形成机理及对器件性能的影响。给出了二种边界陷阱的理论模型，阐述了它的微观结构，研究发现快、慢二种边界陷阱有着不同的缺陷结构，同时还讨论了Ｃ－Ｖ测试技术和ＤＴＢＴ测试技术二种测量边界陷阱的方法，最后论述了边界陷阱的退火效应以及与界面态陷阱和氧化物陷阱的联系与区别，并对所得出结果进行了讨论。 This paper mainly introduces the characteristics, performance, formation mechanism and the influence on the device performance of boundary traps in MOS devices. Two theoretical models of boundary traps are given and their microstructures are described. It is found that the two types of boundary traps have different defect structures, and the two measurement boundaries, C-V and DTBT, are also discussed Finally, the annealing effect of the boundary traps and the connection with the trap of the interface states and the oxide traps are discussed. The results obtained are also discussed.