随着片上系统(SoC)设计复杂度的增加,芯片设计和验证之间的差距逐渐拉大。如何提高验证效率成了集成电路业面临的一个巨大挑战。该文回顾了近年来面向这一挑战的国内外研究工作,提出了一个新的验证范例——边设计边验证。该方法结合结构化设计和递归式验证,用于缓解验证的负担。同时,还提出了实现该方法的基本要素,用于指导未来的研究。 As the complexity of system-on-chip (SoC) designs increases, the gap between chip design and verification is widening. How to improve the verification efficiency has become a huge challenge facing the integrated circuit industry. This article reviews the domestic and foreign research work facing this challenge in recent years and proposes a new verification paradigm - edge design verification. This method combines structured design and recursive verification to ease the burden of verification. At the same time, the basic elements of realizing this method are also proposed to guide future research.