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直到最近以前,模拟界仍然用试验电路板和全定制电路来进行设计.与数字门阵列相比,这种方法往往使原型设计周期要长达几周到几个月.这种局面现在开始发生变化,加州San Jose的International Microelectronic Products公司开发的EPAC(电可编程模拟电路)作为取代试验电路板的办法,向模拟电路设计师提供了与数字FPGA相当的设计手段.IMP50E10有丰富的模拟电路资源;只要把用户定义的配置数据存入芯片上的EEPROM配置在存储器里,就可以通过它们去控制优化的模拟开关,进而把芯片上的各种模拟电路互连起来.芯片上的模拟功能包括各种由用户编程决定的功能,如可编程增益的放大
Until recently, the analog world was still designing with test boards and fully custom circuits, which often resulted in prototype designs lasting weeks to months compared to digital gate arrays. The EPAC (Electrically Programmable Analog Circuits), developed by International Microelectronics Products of San Jose, Calif., As an alternative to test boards, offers analog designers the analogous design of digital FPGAs, which have extensive analog circuit resources ; As long as the user-defined configuration data stored in the on-chip EEPROM configuration in memory, you can use them to control the optimized analog switch, and then interconnect the various analog circuits on the chip.The on-chip analog features include Features that are user-programmed, such as programmable gain amplification