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为满足低电压ＣＭＯＳ晶体管高驱动电流和低静态功耗的要求，提出０．５Ｖ栅衬互连ＧＢＣ（ｇａｔｅ－ｂｏｄｙｃｏｎｎｅｃｔｅｄ）体硅ＭＯＳＦＥＴ工作模式。利用二维器件模拟，对栅长直到７０μｍ的器件结构设计、特性和器件物理研究。得到结果：０．５ＶＧＢＣ－ＭＯＳＦＥＴ具有陡直的亚阈特性（１０倍电流的Ｓ因子为～６０ｍＶ），高的电流驱动能力和理想的逻辑摆幅，栅衬泄漏电流可以忽略；超浅源漏、非均匀纵横向掺杂的Ｅｘｐｏｃ结构在ＧＢＣ模式下栅长直到５０ｎｍ时，仍有很好的Ｖｔｈ可控制性，这一结构的０．５ＶＧＢＣ－ＭＯＳＦＥＴ与１Ｖ常规ＭＯＳＦＥＴ在宽广的阈值电压设计空间中具有相似的速度品值；其理想栅氧厚度为３ｎｍ。
In order to meet the requirements of high driving current and low static power consumption of low voltage CMOS transistors, a 0.5V gate-body connected (IGBT) bulk silicon MOSFET working mode is proposed. Using two-dimensional device simulation, the gate length up to 70μm device structure design, characteristics and device physics. The result is a 0.5V GBC-MOSFET with steep subthreshold characteristics (10 times the current S-factor of ~ 60mV), high current drive capability and ideal logic swing with negligible gate leakage; ultra-shallow source and drain , Non-uniform vertical and horizontal doped Expoc structure in the GBC mode gate length up to 50nm, there is still good Vth controllability, the structure of 0.5VGBC-MOSFET and 1V conventional MOSFET in a wide range of threshold voltage design space Has a similar speed value; its ideal gate oxide thickness of 3nm.