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本文主要是在MIPSI指令系统的基础上完成了32位RISC微处理器设计。重点研究了处理器的指令系统与整体架构,采用VerilogHDL对各功能模块进行设计,工具软件采用Altera公司的Quartus II 6.0,并结合Altera公司的FPGA进行综合验证。
This article is mainly based on the MIPSI command system to complete a 32-bit RISC microprocessor design. It focuses on the instruction system and overall architecture of the processor, designs each functional module by VerilogHDL, and uses Altera’s Quartus II 6.0 software in combination with Altera’s FPGA.