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例7 3线—8线译码器 图形符号如图2.20a所示(CT4138),总限定符号表明此单元的逻辑功能是把二进制码转换成八进制输出。其中[1]、[2]、[3]是二进制码输入端。右边8个引出端是输出端,[4]、[5]、[6]是使能输入端。与上例不同,这里输入内部标注的数字0、1、2是2的幂指数,表示二进制码各输入位的“权”为2~0、2~1、2~2。例如[3]、[2]、[1]分别输入H、H、L电平(注意,采用极性符号后,不存在外部逻辑状态),则其输入内部分别处于“1”、“1”、“0”。它们产生的内部数字为1×2~2+1×2~1+0×2~0=6,所以此时标注数字6的输出内部为’1”,即[9]输出L电平,其余输出内部均为’0”,实现了以下转换:
Example 7 3-Line 8-Line Decoder The graphic symbols are shown in Figure 2.20a (CT4138). The overall qualification symbol indicates that the logical function of this unit is to convert the binary code to octal output. Among them [1], [2], [3] is binary input. The eight right exits are outputs, and [4], [5], [6] are enable inputs. Different from the above example, here enter the internal reference number 0,1,2 is a power of 2 expresses the binary code each input bit “right” is 2 ~ 0,2 ~ 1,2 ~ 2. For example, input the H, H and L levels by [3], [2] and [1] respectively (note that there is no external logic state after the polarity symbol is used) , “0”. The internal numbers they produce are 1 × 2 ~ 2 + 1 × 2 ~ 1 + 0 × 2 ~ 0 = 6, so at this time, the output labeled number 6 is internally “1”, that is, [9] outputs L level, and the rest Output internal are ’0’, to achieve the following conversion: