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采样保持电路(Sample-hold Circuit以下简称S-H电路)在数字系统中已得到广泛的应用.本文所介绍的使用积分校正和恒幅驱动方法的S-H电路已用于中速高精度逐次比较型模数转换器上.转换时间13微秒,分辨率12毕特.S-H电路主要由模拟开关、存贮介质和缓冲放大器组成.常以FET器件作模拟开关,运放作缓冲放大器,其电路原理如图1所示.其中BG_1是模拟开关,D用来在BG_2截止时防止BG_1栅极正偏,C为存贮电
Sample-hold Circuit (SH-circuit) has been widely used in digital systems. The SH circuit using integral correction and constant-amplitude driving method introduced in this paper has been used in medium-speed high-accuracy successive comparison type module Converter. Conversion time of 13 microseconds, resolution of 12 bit. SH circuit is mainly composed of analog switches, storage media and buffer amplifier. Often FET devices for analog switches, op amp buffer amplifier, the circuit shown in Figure 1, where BG_1 is the analog switch, D is used to prevent the BG_1 gate from being forward biased when BG_2 is off, C is the storage capacitor