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CPU的结构是《组成原理》课程的难点,配合实验可以获得更好的教学效果。实验使用Verilog语言设计了一个采用状态机结构的小型CPU。其数据总线宽度为8位,具有通用寄存器等核心部件,指令集的设计参照80x86的汇编指令系统。
CPU structure is the “composition principle” course difficult, with the experiment can get better teaching results. The experiment uses Verilog language to design a small CPU with state machine structure. The data bus width of 8 bits, with general registers and other core components, instruction set design reference 80x86 assembly instruction system.