一、前言数字系统通常接收上升和下降时间长的输入信号,例如,滤波器的输出信号,数据网络信号,传感器的输出信号以及来自振荡器或变压器的信号。从理论上讲,集成逻辑组件的输入和输出之间的高增益产生一个与输入信号上升和下降时间无关的矩形输出脉冲。然而,当输入信号的慢上升沿达到 IC 的开关门限电平 I. INTRODUCTION Digital systems typically receive input signals that rise and fall long, such as filter output signals, data network signals, sensor output signals, and signals from oscillators or transformers. Theoretically, the high gain between the input and output of the integrated logic generates a rectangular output pulse that is independent of the rise and fall times of the input signal. However, when the slow rising edge of the input signal reaches the IC’s switching threshold level