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在集成电路设计制造水平不断提高的今天,SRAM存储器不断朝着大容量、高速度、低功耗的方向发展。文章提出了一款异步256kB(256k×1)SRAM的设计,该存储器采用了六管CMOS存储单元、锁存器型灵敏放大器、ATD电路,采用0.5μm体硅CMOS工艺,数据存取时间为12ns。
In the design and manufacturing of integrated circuits continue to improve today, SRAM memory continues to move towards large-capacity, high-speed, low-power direction. This paper presents an asynchronous design of 256kB (256k × 1) SRAM. The memory uses a six-transistor CMOS memory cell, a latch-type sense amplifier and an ATD circuit. The 0.5μm bulk silicon CMOS technology has a data access time of 12ns .