,Low Specific On-Resistance SOI LDMOS with Non-Depleted Embedded P-Island and Dual Trench Gate

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A new silicon-on-insulator (SOI) trench lateral double-diffused metal oxide semiconductor (LDMOS) with a reduced specific on-resistance Ron,sp is presented.The structure features a non-depleted embedded p-type island (EP) and dual vertical trench gate (DG) (EP-DG SOI).First,the optimized doping concentration of drift region is increased due to the assisted depletion effect of EP.Secondly,the dual conduction channel is provided by the DG when the EP-DG SOI is in the on-state.The increased optimized doping concentration of the drift region and the dual conduction channel result in a dramatic reduction in Ron,sp.The mechanism of the EP is analyzed,and the characteristics of Ron,sp and breakdown voltage (BV) are discussed.Compared with conventional trench gate SOI LDMOS,the EP-DG SOI decreases Ron,sp by 47.1% and increases BV from 196 V to 212 V at the same cell pitch by simulation.
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