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新兴的三维静态存储器将代替二维静态存储器被广泛用于高性能微处理器中,但它依然会受到软错误的危害。为了能够快速、自动分析多层管芯堆叠结构的三维静态存储器软错误特性,搭建了三维静态存储器软错误分析平台。利用该平台对以字线划分设计的三维静态存储器和同等规模的二维静态存储器分别进行软错误分析,并对分析结果进行对比。研究结果表明二维和三维静态存储器的翻转截面几乎相同,但三维静态存储器单个字中发生的软错误要比二维静态存储器更严重,导致难以使用纠检错技术对其进行加固。静态模式下二维和三维静态存储器敏感节点均分布于存储阵列中,表明静态模式下逻辑电路不会引发软错误。
Emerging three-dimensional static memory will be used instead of two-dimensional static memory is widely used in high-performance microprocessors, but it will still be vulnerable to soft errors. In order to quickly and automatically analyze the three-dimensional static memory soft error characteristics of multi-layer die stack structure, a three-dimensional static memory soft error analysis platform was built. Using this platform, the soft error analysis of three-dimensional static memory and two-dimensional static memory of the same scale designed by word line is carried out separately, and the analysis results are compared. The results show that the two-dimensional and three-dimensional static memory flip-flops are almost the same, but the soft errors that occur in a single word of three-dimensional static memory are more serious than the two-dimensional static memory, which makes it harder to use the error correction technique to reinforce it. Static mode two-dimensional and three-dimensional static memory-sensitive nodes are distributed in the storage array, indicating that the static mode logic does not cause soft errors.