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A fully integrated CMOS phase-locked loop(PLL) which can synthesize a quadrature output frequency of 7.656 GHz is presented.The proposed PLL can be employed as a building block for an MB-OFDM UWB frequency synthesizer.To achieve fast loop settling,integer-N architecture operating with 66 MHz reference frequency and wideband QVCO are implemented.I/Q carriers are generated by two bottom-series cross-coupled LC VCOs.Realized in 0.18μm CMOS technology,this PLL consumes 16 mA current(including buffers) from a 1.5 V supply and the phase noise is-109.6 dBc/Hz at 1 MHz offset.The measured oscillation frequency shows that the QVCO has a range of 6.95 to 8.73 GHz.The core circuit occupies an area of 1×0.5 mm~2.
A fully integrated CMOS phase-locked loop (PLL) which can synthesize a quadrature output frequency of 7.656 GHz is presented. The proposed PLL can be employed as a building block for an MB-OFDM UWB frequency synthesizer. To achieve fast loop settling, integer -N architecture operating with 66 MHz reference frequency and wideband QVCO are implemented. I / Q carriers are generated by two bottom-series cross-coupled LC VCOs.Realized in 0.18 μm CMOS technology, this PLL consumes 16 mA current including buffers The 1.5 V supply and the phase noise is-109.6 dBc / Hz at 1 MHz offset. The measured oscillation frequency shows that the QVCO has a range of 6.95 to 8.73 GHz. The core circuit occupies an area of 1 × 0.5 mm -2.