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目前,3D集成技术的优势正在扩展消费类电子产品的潜在应用进入批量市场。这些新技术也在推进着当前许多生产工艺中的一些封装技术包括光刻和晶圆键合成为可能。其中还需要涂胶,作图和蚀刻结构。探讨一些与三维互连相关的光刻技术的挑战。用于三维封装的晶圆键合技术将结合这些挑战和可用的解决方案及发展趋势一并介绍。此外还介绍了一种新的光刻设备,它可通过图形识别技术的辅助实现低于0.25μm的最终对准精度。对于采用光刻和晶圆级键合技术在三维互连中的挑战,趋势和解决方案及SUSS公司设备平台的整体介绍将根据工艺要求来描述。在这些技术中遇到的工艺问题将集中在晶圆键合和光刻工序方面重点讨论。
At present, the advantages of 3D integrated technology are expanding the potential applications of consumer electronics products into the mass market. These new technologies are also driving some of the packaging technologies currently available in many production processes, including lithography and wafer bonding. Which also need to glue, drawing and etching structure. Explore some of the challenges associated with lithography in 3D interconnects. Wafer bonding technology for 3D packaging will combine these challenges with available solutions and trends. In addition, a new lithographic apparatus is introduced, which achieves a final alignment accuracy of less than 0.25 μm with the aid of pattern recognition technology. The challenges, trends and solutions in 3D interconnects using lithography and wafer-level bonding technology, and the overall introduction of the SUSS device platform will be described in terms of process requirements. Process problems encountered in these technologies will focus on wafer bonding and lithography processes.