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介绍了一种8～20 GHz单片低噪声放大器的研制过程。本电路采用两级放大拓扑,自偏置结构。采用串联负反馈技术降低噪声系数和输入驻波比,采用负反馈技术扩展带宽和提高动态范围。电路设计基于Agilent ADS微波设计环境,并进行版图电磁场验证以提高设计的准确率。芯片在0.25μm GaAs PHEMT工艺线上加工制作。测试结果表明,在8～20 GHz频率范围内,增益大于13 dB(正斜率),噪声系数小于3 dB,输入输出驻波比小于2∶1,1 dB压缩输出功率典型值为15 dBm,单电源5 V供电,电流小于90 mA。芯片面积为1.72 mm×1.35 mm。该芯片可广泛应用于各种微波系统。
The development of an 8 ~ 20 GHz monolithic low noise amplifier is introduced. The circuit uses two amplification topology, self-biasing structure. Using series negative feedback technology to reduce the noise figure and input VSWR, using negative feedback technology to expand the bandwidth and improve the dynamic range. The circuit design is based on the Agilent ADS Microwave Design Environment and performs layout electromagnetic field verification to improve design accuracy. The chip is fabricated on 0.25μm GaAs PHEMT process line. The test results show that the gain is greater than 13 dB (positive slope) in the frequency range of 8 to 20 GHz, the noise figure is less than 3 dB, the input-output VSWR is less than 2: 1 and the 1 dB compression output power is typically 15 dBm Power supply 5 V, current less than 90 mA. The chip area is 1.72 mm × 1.35 mm. The chip can be widely used in a variety of microwave systems.