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时间数字化技术广泛应用于现代大型物理实验和核医学仪器等领域。该文介绍了基于现场可编程门阵列(FPGA)进位链结构的时间数字转换器(TDC)的设计,研究了器件进位链结构、内核电压和环境温度对TDC精度的影响,并设计了独立的自标定机制。使用该方法在低成本的Cyclone II系列FPGA上实现了32通道时间数字转换模块。测试结果表明:各通道TDC的性能一致,达到了25ps(均方根)的测量精度,信号周期和脉宽的测量精度分别好于35ps和45ps。该设计具有高密度、高精度和低成本的特点,可以满足大多数时间测量应用需求。
Time digital technology is widely used in modern large-scale physics experiments and nuclear medicine instruments and other fields. This paper introduces the design of a time-to-digital converter (TDC) based on the carry chain structure of a field programmable gate array (FPGA), studies the influence of the carry chain structure, the core voltage and the ambient temperature on the accuracy of the TDC and designs an independent Self-calibration mechanism. Use this method to implement a 32-channel time-to-digital conversion module on a low-cost Cyclone II family of FPGAs. The test results show that the performance of TDC of each channel is consistent, and the measurement accuracy of 25ps (root mean square) is achieved. The measurement accuracy of signal period and pulse width is better than 35ps and 45ps respectively. The design features high density, high accuracy, and low cost to meet the needs of most time measurement applications.