Nano-scaled transistor reliability characterization at nano-second regime

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Dear editor,rnIn recent years,novel MOSFET structures such as fully-depleted silicon-on-insulator(FDSOI)MOSFET and Fin-FET are adopted by the industry for their excellent elec-trostatic behavior and higher on-state current per footprint.Nevertheless,these novel structured transistors suffer from severe self-heating effects(SHE)owing to the more heat gen-eration but lower thermal conductivity of the ultrathin Si channel[1].Not only does SHE degrade the device perfor-mance and reliability,but also it imposes additional chal-lenges inaccurate device characterization[2].For example,the severe SHE generated in the time-consuming measure-ment process will affect the accurate interpretation of relia-bility lifetime[3].Among all the degradation issues of the nano-scaled transistors,hot carrier injection(HCI)is consid-ered a widely concerned problem for nMOSFETs.Accurate extraction methodology is required to obtain the precise HCI degradation parameters,namely,ΔVTH and ΔIDSAT,which are highly dependent on the channel temperature and the trapping-detrapping process of interface defects[4].To ex-empt the effect of both factors,reducing measurement time to the nano-second regime is essential[5].
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