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基于CSMC 0.18μm工艺,设计了一款瞬态增强的无片外电容LDO。设计误差放大器时,采用改进的第2级放大器提高功率管栅端的充放电速度,从而提高瞬态响应。采用嵌套密勒补偿方式来保证LDO的稳定性。仿真结果表明,输入电压为2~4.5V时,LDO的输出电压为1.8V,负载电流在1~300mA之间具有良好的稳定性,响应时间为1.4μs,最大过冲电压为84mV。
Based on the CSMC 0.18μm process, a transient-free, chipless external capacitor LDO is designed. When designing an error amplifier, an improved second stage amplifier is used to increase the charge-discharge speed at the gate of the power transistor, thereby improving the transient response. The use of nested Miller compensation to ensure the stability of LDO. The simulation results show that the LDO output voltage is 1.8V and the load current is 1 ~ 300mA with good stability when the input voltage is 2 ~ 4.5V, the response time is 1.4μs and the maximum overshoot voltage is 84mV.