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A visible rectification effect on the current-voltage curves of metal/porous silicon/p-silicon has been observed by current- sensing atomic force microscopy. The current-voltage curves of porous silicon membranes with different porosities, prepared through variation of etching current density for a constant time, indicate that a higher porosity results in a higher resistance and thus a lower rectification, until the current reaches a threshold at a porosity >55%. We propose that the conductance mode in the porous silicon membrane with porosities >55% is mainly a hopping mechanism between nano-crystallites and an inverse static electric field between the porous silicon and p-Si interface blocks the electron injection from porous silicon to p-Si, but with porosities ≥55%, electron flows through a direct continuous channel between nano-crystallites.
A visible rectification effect on the current-voltage curves of metal / porous silicon / p-silicon has been observed by current-sensing atomic force microscopy. The current-voltage curves of porous silicon membranes with different porosities, prepared through variation of etching current density for a constant time, indicate that a higher porosity results in a higher resistance and thus a lower rectification, until the current reaches a threshold at a porosity> 55%. We propose that the conductance mode in the porous silicon membrane with porosities> 55% is mainly a hopping mechanism between nano-crystallites and an inverse static electric field between the porous silicon and p-Si interface blocks the electron injection from porous silicon to p-Si, but with porosities ≧ 55% between nano-crystallites.