在锁相环(PLL)中接入中频级而引入的额外时延,导致此环路捕捉和跟踪性能严重下降,由Mcgeehan和Sladen提出的分环型锁相系统,大大地降低了时延对此环路捕捉和跟踪性能的影响。本文研究了分环型锁相接收机的频率捕捉特性,并探讨此环路中可能不对称性的支路对捕捉带的影响。对闭环路的近似公式作了推导,并对分环型、长环型和短环型之间的捕捉性能进行了比较。 The additional delay introduced into the mid-frequency stage in the phase-locked loop (PLL) results in a severe reduction in capture and tracking performance for this loop. The fractional-loop phase lock system proposed by McGeehan and Sladen greatly reduces the latency This loop captures and tracks the performance impact. In this paper, we study the frequency-capture characteristics of a fractional-loop PLL and discuss the influence of the possible asymmetric branches on the acquisition band. The approximate formula of the closed loop is deduced, and the capture performance between sub-ring, long ring and short ring is compared.