用数值计算方法详细地模拟了VLSI电路中金属互连线的延迟及串扰 .模拟结果表明 :互连线宽W同互连线节距P之比W/P =0 5～ 0 6是获得最小时间延迟并满足串扰限制的最佳尺寸 ,模拟还给出了用铜代替铝金属线及用low k电介质 (εlow k=0 5εSiO2 )代替SiO2 后 ,延迟及串扰的改善程度 The numerical simulation is used to simulate the delay and crosstalk of the metal interconnects in the VLSI circuit in detail.The simulation results show that the ratio W / P = 0 5 ~ 0 6 of the interconnect width W to the interconnection pitch P is the minimum Time delay and meet the crosstalk limit of the optimal size, the simulation also shows the use of copper instead of aluminum metal wire and a low k dielectric (εlow k = 0 5εSiO2) instead of SiO2, the improvement of the degree of delay and crosstalk