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基于SMIC 0.18μm CMOS工艺,设计了一种高电源抑制比低噪声的带隙基准源。此电路在3.3V电源电压下具有较好的温度系数,-40℃~125℃范围内的温度系数为8.6 ppm/℃,带隙基准电路输出电压约为1.195V。通过在基准中运放加入电源抑制比增强级电路提高中低频范围PSRR性能,在电路输出端再引入低通滤波器电路以提高中高频范围PSRR性能,并且低通滤波器有助于降低整个电路的噪声。采用Spectre软件进行仿真,结果显示,电源抑制比为-130.4@dc,-77.6@100KHz,输出噪声为24.8n V@100KHz。该带隙基准源电路非常适合于应用在高电源电压抑制比、低噪声的LDO电路中。
Based on the SMIC 0.18μm CMOS process, a bandgap reference with high power rejection and low noise is designed. The circuit has a good temperature coefficient at a supply voltage of 3.3V and a temperature coefficient of 8.6 ppm / ° C in the range of -40 ° C to 125 ° C. The output voltage of the bandgap reference circuit is about 1.195V. The PSRR performance in the mid- to low-frequency range is improved by adding a power-supply rejection ratio enhancement stage op amp in the reference, a low-pass filter circuit is introduced at the output of the circuit to improve PSRR performance in the mid- and high-frequency range, and the low-pass filter helps to reduce the overall circuit Noise. Using Specter software simulation, the results show that the power supply rejection ratio of -130.4 @ dc, -77.6 @ 100KHz, the output noise of 24.8nV @ 100KHz. The bandgap reference circuit is ideal for use in high supply voltage rejection ratio, low noise LDO circuits.