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多值逻辑(MVL)相对二值逻辑具有更高的逻辑密度,可以相对简单的结构承载更多的信息,是一条值得探索的提升电路信息处理能力的途径。以共振隧穿二极管(RTD)为主要器件,设计了一种带有进位信号的集约三值全加器电路。不同于传统的设计方法,该设计结合进位信号的逻辑特点和RTD电路的特性,使用较少的器件实现了逻辑功能,极大地降低了电路的复杂度,适应于大规模MVL电路的设计。该设计弥补了MVL电路在功能级上的空缺,丰富了MVL电路的类型,对今后基于MVL发展更复杂的电路系统打下了基础。
Multi-valued logic (MVL) Relative binary logic has a higher logic density and can carry more information in a relatively simple structure, which is worth exploring to improve the circuit information processing capability. With resonant tunneling diode (RTD) as the main device, an integrated three-input full adder circuit with carry signal is designed. Different from the traditional design method, this design combines the logical characteristics of carry signal with the characteristics of RTD circuit, and uses fewer devices to realize the logic function, greatly reducing the complexity of the circuit and adapting to the design of large-scale MVL circuit. This design makes up for the MVL circuit in the functional level of vacancies, enriched MVL circuit type, the future development of more complex circuit based on MVL laid the foundation.