Analysis and design of a high-linearity receiver RF front-end with an improved 25%-duty-cycle LO gen

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A rally integrated receiver RF front-end that meets WCDMA/GSM system requirements is presented.It supports SAW-less operation for WCDMA.To improve the linearity in terms of both IP3 and IP2,the RF front-end is comprised of multiple-gated LNAs with capacitive desensitization,current-mode passive mixers with the proposed IP2 calibration circuit and reconfigurable Tow-Thomas-like biquad TIAs.A new power-saving multi-mode divider with low phase noise is proposed to provide the 4-phase 25%-duty-cycle LO.In addition,a constant-g_m biasing with an on-chip resistor is adopted to make the conversion gain invulnerable to the process and temperature variations of the transimpedance.This RF front-end is integrated in a receiver with an on-chip frequency synthesizer in 0.13μm CMOS.The measurement results show that owing to this high-linearity RF front-end,the receiver achieves -6 dBm IIP3 and better than +60 dBm IIP2 for all modes and bands. A rally integrated receiver RF front-end that meets WCDMA / GSM system requirements is presented .It supports SAW-less operation for WCDMA.To improve the linearity in terms of both IP3 and IP2, the RF front-end is comprised of multiple-gated LNAs with capacitive desensitization, current-mode passive mixers with the proposed IP2 calibration circuit and reconfigurable Tow-Thomas-like biquad TIAs. A new power-saving multi-mode divider with low phase noise is proposed to provide the 4-phase 25% duty-cycle LO. addition, a constant-g biasing with an on-chip resistor is made to make the conversion gain invulnerable to the process and temperature variations of the transimpedance. This RF front-end is integrated in a receiver with an on -chip frequency synthesizer in 0.13 μm CMOS. The measurement results show that due to this high-linearity RF front-end, the receiver achieves -6 dBm IIP3 and better than +60 dBm IIP2 for all modes and bands.
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