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提出了一种同步型时序逻辑电路的机助设计程序。所设计的电路由四级 J—K 触发器或 D 触发器组成。根据设计要求,通过本程序的运行,可获得最佳的组合逻辑电路的参数。
This paper presents a machine-assisted design program of synchronous type sequential logic circuit. The circuit designed by the four J-K flip-flop or D flip-flop components. According to the design requirements, through the operation of this program, you can get the best combination of logic circuit parameters.