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在电力电子模块装配中采用的绝大多数电力半导体芯片都具有内在的垂直结构,其中金属化的输入/输出电极(垫片)安置在芯片的两侧。通常,栅极和源极(或射极)垫片带着薄膜金属铝(AI)端子放置在顶部表面以利超声联结。漏极(或集电极)是做在芯片底部的沉积金属化层(大多数情况下为银或金),它是准备焊接到基础衬底上去的。这种垂直结构使人可以构成一种分层型三维多芯片模块(Multi- chip-module,简称MCM)结构。图4(a)表示按这种方法设计的电力电子模块的剖面图。它包括三个层次:
Most power semiconductor chips used in power electronic module assemblies have an inherent vertical structure in which metallized input / output electrodes (pads) are placed on both sides of the chip. Typically, the gate and source (or emitter) pads are placed on the top surface with thin film aluminum (AI) terminals for ultrasonic bonding. The drain (or collector) is a deposited metallization (mostly silver or gold) on the bottom of the chip that is to be soldered to the base substrate. This vertical structure allows one to construct a hierarchical three-dimensional Multi-chip-module (MCM) structure. Figure 4 (a) shows a sectional view of a power electronic module designed in this way. It includes three levels: