在集成电路测试过程中,为提高生产效率,常使用多SITE并测的方法。但多SITE并测,容易出现连线交叉错误,导致测试异常,造成严重的质量事故。因而如何做到防呆,确保连线无误,是多SITE并测必须要解决的难题。本文介绍了两种用于集成电路测试防错的方法,防止连线错误,对提升测试的品质具有重要意义。 In the IC testing process, in order to improve production efficiency, often using multiple SITE and measuring method. But more SITE and measured, prone to cross-connection error, resulting in abnormal testing, causing serious quality accidents. So how to be fool-proof, to ensure that the connection is correct, is more than SITE and test must solve the problem. This article describes two methods for error proofing of integrated circuit tests that prevent connection errors and are important for improving test quality.