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围绕降低沟槽型SOI LDMOS功率器件的优值,提出了一种新型多栅沟槽SOI LDMOS器件(MG-TMOS)。与常规沟槽型SOI LDMOS(C-TMOS)器件相比,新型MG-TMOS器件在不牺牲击穿电压的同时,降低了器件开关切换时充放电的栅漏电荷和器件的比导通电阻。这是因为:1)新型MG-TMOS器件沟槽里的保护栅将器件的栅漏电容转换为器件的栅源电容和漏源电容,大幅度降低了器件的栅漏电荷;2)保护栅偏置电压的存在使得器件导通时会在沟槽底部形成一层低阻积累层,从而降低器件的导通电阻。仿真结果表明:该新型沟槽型SOI LDMOS器件的优值从常规器件的503.4mΩ·nC下降到406.6mΩ·nC,实现了器件的快速关断。
Aiming at reducing the merit of trench-type SOI LDMOS power devices, a novel multi-gate trench SOI LDMOS device (MG-TMOS) is proposed. Compared with the conventional trench-type SOI LDMOS (C-TMOS) device, the new MG-TMOS device reduces the gate-drain charge and discharge charges and the specific on-resistance of the device without sacrificing the breakdown voltage. This is because: 1) The protective gate in the trench of the new MG-TMOS device converts the gate-drain capacitance of the device into the gate-source capacitance and drain-source capacitance of the device, greatly reducing the gate-drain charge of the device; and 2) The presence of a set voltage makes the device turn on to form a low-resistance accumulation layer at the bottom of the trench, thereby reducing the on-resistance of the device. The simulation results show that the excellent value of the new trench-type SOI LDMOS device is reduced from 503.4mΩ · nC to 406.6mΩ · nC of the conventional device, which realizes the fast turn-off of the device.