高频设计过程如图1所示,由于它的加工制作复杂,且高频段存在寄生参数影响,所以设计精度比低频设计的要差。其结果是:相当多的电路初样完全不能用,大部分的电路初样需作很大修正,许多工程师在实际设计中颇为棘手,不可能坐在计算机前就能完成。这样,高频子系统从设计到投入市场的周期就很长。那么,数字电路越来越复杂,而为什么其设计周期却越来越短呢?其中首要的原因就是很少进行测量和电路原型的调整,而是依靠综合性的CAE(计算机辅助工程)工具。诚然,在高频设计中,在忽略了复杂的高频寄生特性,而且第一开关速率足够低的情况下,设计工作已经 The high-frequency design process shown in Figure 1, due to its complex processing, and the existence of high-frequency parasitic parameters, so the design accuracy is worse than the low-frequency design. As a result, a significant number of circuits are initially unusable and most of the circuits are subject to major corrections. Many engineers find it difficult to actually sit in front of a computer. In this way, the frequency of high-frequency subsystems from design to market is very long. So, digital circuits are becoming more and more complicated, and why their design cycles are getting shorter? The primary reason is that few measurements and circuit prototypes are relied upon, but rather a comprehensive CAE tool. Indeed, in high-frequency design, ignoring the complex high-frequency parasitic characteristics, and the first switch rate is low enough, the design work has been