Physical Mechanism and Performance Factors of Metal Oxide Based Resistive Switching Memory:A Review

来源 :Journal of Materials Science & Technology | 被引量 : 0次 | 上传用户:laurachenqh
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This review summarizes the mechanism and performance of metal oxide based resistive switching memory The origin of resistive switching(RS) behavior can be roughly classified into the conducting filament type and the interface type. Here,we adopt the filament type to study the metal oxide based resistive switching memory,which considers the migration of metallic cations and oxygen vacancies,as well as discuss two main mechanisms including the electrochemical metallization effect(ECM) and valence change memory effect(VCM). At the light of the influence of the electrode materials and switching layers on the RS characteristics,an overview has also been given on the performance parameters including the uniformity endurance,the retention,and the multi-layer storage. Especially,we mentioned ITO(indium tin oxide electrode and discussed the novel RS characteristics related with ITO. Finally,the challenges resistive random access memory(RRAM) device is facing,as well as the future development trend,are expressed. This review summarizes the mechanism and performance of metal oxide based resistive switching memory The origin of resistive switching (RS) behavior can be ornamented by The origin of resistive switching memory resistive switching memory, which considers the migration of metallic cations and oxygen vacancies, as well as discussing two main mechanisms including the electrochemical metallization effect (ECM) and valence change memory effect (VCM). At the light of the influence of the electrode materials and switching layers on the RS characteristics, an overview has also been given on the performance parameters including the uniformity endurance, the retention, and the multi-layer storage. Especially, we mentioned ITO (indium tin oxide electrode and discussed the novel RS characteristics related with with ITO. Finally, the challenges resistive random access memory (RRAM) device is facing, as well as the future development tr end, are expressed.
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