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传统扫描链将所有扫描单元串联,测试数据的移位路径较长,导致测试移位功耗较大.首次提出代表扫描结构,它将传统扫描链或子链中的触发器改造成环形移位寄存器,为每个环形移位寄存器遴选一个代表触发器,并将这些代表触发器串联,构成具有若干局部循环的代表扫描结构.由于代表扫描结构中仅有部分触发器参与数据移位,这大大减少了移位功耗.对于ISCAS89 benchmark电路来说,最优的代表扫描结构的移位功耗仅为传统直链扫描结构的4.68%～13.59%之间,而且电路越大,移位功耗减少的越多.对于S35932电路来说,其环形移位寄存器大小为42时,对应的移位功耗仅为直链扫描结构的4.68%.该结构仅需要在每个触发器上增加一个选择器用来选择不同的测试模式,具有较小的硬件代价.
The traditional scan chains connect all the scan cells in series and the shift of the test data takes longer, resulting in a large test shift power consumption. For the first time, a representative scan structure is proposed, which transforms the flip-flops in the traditional scan chains or subchains into ring- Register to select a representative flip-flop for each of the ring-shaped shift registers and connect these representative flip-flops in series to form a representative scan structure having a number of partial loops. Since only a part of the flip-flops in the representative scan structures are involved in data shifting, Reducing the shift power consumption.For the ISCAS89 benchmark circuit, the optimal representative of the scanning structure of the shift power consumption is only 4.68% to 13.59% of the traditional straight-chain scanning structure, and the larger the circuit, the shift power For the S35932 circuit, the corresponding shift power consumption is 4.68% of the linear scan structure with a ring shift register size of 42. The structure only needs to add one selection to each flip-flop Used to select a different test mode, with less hardware costs.