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介绍了提高测试效率的SOC芯片在片测试的两种并行测试方法,结合上海集成电路技术与产业促进中心的多个实际的SOC芯片测试项目中所积累的成功经验,针对多工位测试和多测试项目平行测试这两种并行测试方法,主要阐述了在SOC芯片的并行测试中经常遇到的影响测试系统和测试方法的问题,提出了在SOC芯片在片测试中的直流参数测试、功能测试、模数/数模转换器(ADC/DAC)测试的影响因素和解决方案,并对SOC芯片在测试过程中经常遇到的干扰因素进行分析,尽可能保证SOC芯片在片测试获得的各项性能参数精确、可靠。
This paper introduces two parallel test methods of on-chip SOC chip test in order to improve test efficiency. Combining the successful experience accumulated in many actual SOC chip test projects of Shanghai IC Technology and Industry Promotion Center, Test Project Parallel Test These two parallel test methods mainly describe the problems that affect the test system and test methods often encountered in the parallel SOC chip test. The paper presents the DC parameter test, functional test , ADC / DAC test factors and solutions, and SOC chip in the testing process frequently encountered interference analysis, as far as possible to ensure the SOC chip in the chip test obtained Performance parameters accurate and reliable.