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本文给出了三极管回路带宽限制及采用多调谐回路增大带宽在理论上的可能性。叙述了用微波阻抗匹配网络设计三极管级联放大器的方法。对实际回路进行了数值计算模拟。制造了脉宽为430微秒,工作比为0.02,中心频率为550兆赫,相对带宽为10%,增益为24分贝,输出脉冲峰值功率为2.6千瓦的两级级联放大器。理论计算与实测结果良好地一致。本设计方法可推广应用到多级级联放大器的设计中,亦可作宽带整腔三极管设计参考。
In this paper, the circuit bandwidth limitations of the transistor and the possibility of using a multi-tuned loop to increase the bandwidth are theoretically possible. Describes the use of microwave impedance matching network design transistor cascade amplifier method. The actual loop is numerically simulated. A two-stage cascaded amplifier with a pulse width of 430 μs, a duty ratio of 0.02, a center frequency of 550 MHz, a relative bandwidth of 10%, a gain of 24 dB, and an output pulse peak power of 2.6 kW was manufactured. The theoretical calculation and the measured results are in good agreement. The design method can be extended to the design of multi-stage cascaded amplifier, wide-band tunable transistor can also be used as a reference design.