集成电路技术发展迅速,使得可复用的知识产权(IP)核设计受到业界的广泛重视.本文在深入研究高级微控制器总线架构(AMBA)功能特点的基础上,设计了一种功能相对齐全的IP核,对其划分功能模块并完成其结构设计,理清了IP核内部各模块之间的关系,并采用自顶向下的设计方法搭建出IP核的内部架构.利用Verilog语言对IP核接口模块、寄存器模块、波特率模块、发送模块、接收模块以及中断模块等进行了详细设计.仿真验证表明,设计的IP核支持高级外围总线(APB)总线协议,IP核的功能覆盖率达到100％,其最高工作频率达到200 MHz,资源占用率小于15％.可复用的IP核能够支持多种数据格式、多种时序传输方式以及主机/从机操作模式,减少了硬件电路的资源消耗,具有更强的适用性.“,”With the rapid development of integrated circuit (IC)technology,reusable intelligent property (IP)core design is widely valued by the industry.Based on the in-depth study of the functional characteristics of advanced microcontroller bus architecture (AMBA),a design scheme of IP core is presented,and it is divided into the functional modules,and the structural design of the IP core is completed.The relationship between the internal modules of the IP core is clarified,and the top-down design method is used to build the internal architecture of the IP core.The IP core interface module,register module,baud rate module,transmit module,receive module,and interrupt module are designed in detail by using Verilog language.The simulation results show that the designed IP core supports serial peripheral interface (SPI)protocol,the function coverage of IP core reaches 100％,the maximum working frequency reaches 200 MHz,and the resource occupancy rate is less than 15％.The reusable IP core can support multiple data formats,multiple timing transmission modes,and master/slave operation modes, reducing the resource consumption of hardware circuits and having stronger applicability.