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文章提出了一种基于逐位循环开方算法，“四位一开方”的浮点开方运算单元的电路设计方案，使限制周期时间的循环迭代部分的门级数降低到14级。按14级门延时为周期时间计算，完成一个IEEE单、双精度浮点数的开方运算分别需要15和29周期。同时，文章对目前开方运算所采用的两类主要的算法-逐位循环开方算法和牛顿－莱福森迭代开方算法进行了描述，其中包括数的冗余表示等内容。
In this paper, we propose a circuit design scheme of floating-point operation unit based on bit-by-bit looping and square-rooting algorithm, which reduces the gate-level number of cyclic iteration time limit to 14 . According to the 14-gate delay for the cycle time calculation, the completion of an IEEE single, double precision floating-point operations require 15 and 29 cycles respectively. At the same time, the article describes two main types of algorithms used in the present square-root operation: the bit-by-bit iterative square-rooting algorithm and the Newton-Raphson iterative method, including the redundant representation of numbers and so on.