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随着集成电路工艺尺寸下降到纳米级,负偏置温度不稳定性(NBTI)成为影响电路可靠性的首要老化效应.精确的老化预测模型是节省防护开销的重要前提.针对已有反应扩散机制下阈值电压变化预测模型存在的预测偏差问题,本文分析了NBTI空穴俘获释放机制下阈值电压变化模型,提出了新的组合逻辑门传输延迟预测模型(TDDP),达到了更精确预测数字电路老化的目的,为老化防护提供了更优的参考模型.实验结果表明,针对设置时序余量的老化防护方法,在保证10年等值生命周期可靠性的前提下,参考TDDP模型比参考已有的RD延迟模型减少平均17.8%的时序余量开销.
As integrated circuit technology shrinks to nano-scale, negative bias temperature instability (NBTI) becomes the primary aging effect that affects the reliability of the circuit.A precise aging prediction model is an important prerequisite for saving the protection cost.According to the existing reaction diffusion mechanism Under threshold voltage variation prediction model, this paper analyzes the threshold voltage variation under NBTI hole trap release mechanism and proposes a new combined logic gate transmission delay prediction model (TDDP) to achieve a more accurate prediction of digital circuit aging , And provides a better reference model for aging protection.The experimental results show that for the aging protection method of setting the timing margin, under the premise of ensuring the reliability of the 10-year equivalent life cycle, the reference TDDP model is better than the reference existing The RD delay model reduces the timing margin overhead by an average of 17.8%.