提出一种新型的应用于数字中频接收机的开关电容带通ΔΣ调制器架构,该架构基于前馈结构,利用双采样可调谐谐振器,噪声耦合技术和4比特量化器,使调制器在GSM,WCDMA和TD-SCDMA标准下都能达到高的信噪比和动态范围,3个标准的带宽分别为200kHz,5MHz和1.6MHz.后仿结果显示,在0.13μm工艺下GSM/WCDMA/TD-SCDMA的信号噪声失真比分别为84.73/59.89/65.24dB,动态范围的仿真结果分别为87,72和82dB.电路的采样频率为100MHz,工作电压为1.2V,总功耗为16.1mW. A novel switched-capacitor bandpass ΔΣ modulator architecture for digital IF receivers is proposed. The architecture is based on a feedforward architecture using a dual-sampling tunable resonator, a noise-coupling technique, and a 4-bit quantizer, , WCDMA and TD-SCDMA standards can achieve high signal to noise ratio and dynamic range, the three standard bandwidth were 200kHz, 5MHz and 1.6MHz.Figure shows that after the 0.13μm process GSM / WCDMA / TD- SCDMA signal noise distortion ratio was 84.73 / 59.89 / 65.24dB, the dynamic range of the simulation results were 87,72 and 82dB respectively. The circuit sampling frequency of 100MHz, the operating voltage of 1.2V, the total power consumption of 16.1mW.