论文部分内容阅读
针对粒子滤波算法是计算量大、实时性差,难于硬件实现的特点,本文提出了用于目标跟踪问题的样本-重要性-重采样粒子滤波算法(SIRF)的模块级流水线设计方法。SIRF算法最重要的部分是数据中心,它负责处理模块之间大量的数据传输。整个滤波器使用模块级流水线设计,主要包括粒子生成模块、粒子更新模块、重采样模块、输出生成模块,该设计大大简化了设计流程。模块级流水线通过分布式控制器来实现同步执行,该控制器控制各个处理模块的数据生成和传输。最后利用Xilinx FPGA验证了该滤波器的实时性。
Due to the large amount of computation, poor real-time performance and hard hardware implementation, the particle filter algorithm is proposed in this paper. This paper presents a modular-importance-resampled particle filter (SIRF) module-level pipeline design method for target tracking problem. The most important part of the SIRF algorithm is the data center, which handles a large amount of data transfer between modules. The entire filter module-level pipeline design, including particle generation module, particle update module, resampling module, the output generation module, the design greatly simplifies the design process. The module-level pipeline through the distributed controller to achieve synchronous execution, the controller controls the various processing module data generation and transmission. Finally, the real-time performance of the filter was verified by Xilinx FPGA.