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介绍了一种新型的I-V特性为Λ型的负阻器件(negative resistance device,NRT),该器件使用上华0.5μm标准互补金属氧化物半导体(complementary metal-oxide-semiconductor transistor,CMOS)工艺制造.为节省器件数目,此类负阻器件并不调用上华工艺库中现有的标准元件模型,而是将一个金属氧化物半导体场效应晶体管(metal-oxide-semiconductor field effect transistor,MOSFET)和一个双极晶体管(bipolar junction transistor,BJT)制作在相同的n阱中,利用p型基区层作为MOSFET的衬底,从而将两个器件合二为一.NRT拥有较低的谷值电流-6.8217nA和较高的电流峰谷比(peak-to-valley current ratio,PVCR)为3591.器件的峰值电流较小,为-24.4986μA,意味着较低的功耗.该负阻器件的平均负阻阻值为32kΩ.不同于近年来的大多数负阻器件,本器件制作于硅材料衬底上而非化合物材料衬底.因而能够与主流CMOS工艺兼容.新型NRT功耗较低,同时能够极大地节省器件数目,减小芯片占用面积,极大地降低了成本费用.
A new type of negative resistance device (NRT) with Λ type IV characteristics is introduced. The device is fabricated by using a 0.5μm standard CMOS (complementary metal-oxide-semiconductor transistor) process. In order to save the number of devices, such a negative resistance device does not call an existing standard component model in the Shanghai Hua Technology Library. Instead, a metal-oxide-semiconductor field effect transistor (MOSFET) and a Bipolar junction transistors (BJTs) are fabricated in the same n-well, using p-type base layer as a substrate for the MOSFET, thereby combining the two devices into one. NRT has a low valley current of -6.8217 nA and a high peak-to-valley current ratio (PVCR) of 3591. The device has a small peak current of -24.4986 μA, meaning lower power dissipation.The negative average resistance of the negative resistance device The resistance is 32kΩ. Unlike most of the negative resistance devices in recent years, this device is fabricated on a silicon material substrate rather than a compound material substrate and is therefore compatible with mainstream CMOS technology. The new NRT consumes less power while being able to great To save the number of devices, reducing the chip footprint, greatly reducing costs.