Terminal-optimized 700-V LDMOS with improved breakdown voltage and ESD robustness

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A novel terminal-optimized triple RESURF LDMOS (TOTR-LDMOS) is proposed and verified in a 0.25-μm bipolar-CMOS-DMOS (BCD) process.By introducing a low concentration region to the terminal region,the surface electric field of the TOTR-LDMOS decreases,helping to improve the breakdown voltage (BV) and electrostatic discharge (ESD) robust-ness.Both traditional LDMOS and TOTR-LDMOS are fabricated and investigated by transmission line pulse (TLP) tests,direct current (DC) tests,and TCAD simulations.The results show that comparing with the traditional LDMOS,the BV of the TOTR-LDMOS increases from 755 V to 817 V without affecting the specific on-resistance (Ron,sp) of 6.99 Ω·mm2.Meanwhile,the ESD robustness of the TOTR-LDMOS increases by 147%.The TOTR-LDMOS exhibits an excellent performance among the present 700-V LDMOS devices.
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