论文部分内容阅读
设计一种用标准双极型工艺制备的、实验性二位等离子体耦合移位寄存器时,发现由于去掉了双基极二极管,使现有的等离子体耦合器件(PGD)概念简化,不仅减少了功耗及容易制造,并且也使基本单元进一步引人注目地简单。新器件在3兆周时钟频率下,平均功耗为200微瓦/位。用10微米宽的线条和10微米布线间距时,位密度为135位/平方毫米。如果采用介质隔离及更紧容差布图,则位密度可达900位/平方毫米,予计功耗为80微瓦/位。
When designing an experimental two-position plasma-coupled shift register fabricated using a standard bipolar process, it was found that by eliminating the double-base diode, the existing concept of plasma-coupled device (PGD) was simplified not only by reducing Power consumption and ease of manufacture, and also makes the basic unit even more compelling. The new device consumes an average of 200 microwatts per bit at a 3-megabit clock rate. With 10 micron wide lines and 10 micron wiring spacing, the bit density is 135 bits / mm2. With media isolation and tighter tolerance layouts, the bit density can reach 900 bits / square millimeter, with an estimated power consumption of 80 microwatts per bit.