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Pixel image lag in a 4-T CMOS image sensor is analyzed and simulated in a two-dimensional model.Strategies of reducing image lag are discussed from transfer gate channel threshold voltage doping adjustment,PPD N-type doping dose/implant tilt adjustment and transfer gate operation voltage adjustment for signal electron transfer.With the computer analysis tool ISE-TCAD,simulation results show that minimum image lag can be obtained at a pinned photodiode n-type doping dose of 7.0×10~(12) cm~(-2),an implant tilt of -2°,a transfer gate channel doping dose of 3.0×10~(12) cm~(-2) and an operation voltage of 3.4 V.The conclusions of this theoretical analysis can be a guideline for pixel design to improve the performance of 4-T CMOS image sensors.
Pixel image lag in a 4-T CMOS image sensor is analyzed and simulated in a two-dimensional model. Strategies for reducing image lag are discussed from transfer gate channel threshold voltage doping adjustment, PPD N-type doping dose / implant tilt adjustment and transfer gate operation voltage adjustment for signal electron transfer. With the computer analysis tool ISE-TCAD, simulation results show that minimum image lag can be obtained at a pinned photodiode n-type doping dose of 7.0 × 10 ~ (12) cm ~ (-2) ), an implant tilt of -2 °, a transfer gate channel doping dose of 3.0 × 10 ~ (12) cm -2 and an operation voltage of 3.4 V. The conclusions of this theoretical analysis can be a guideline for pixel design to improve the performance of 4-T CMOS image sensors.